DMA and Interrupts


For long-running operations, we would like to have the device notify the CPU through an interrupt. To add an interrupt to the device, we need to create an IntSourceNode in the lazy module.

val intnode = IntSourceNode(IntSourcePortSimple(resources =

Then, in the module implementation, we can connect the complete register to the interrupt line. That way, the CPU will get interrupted once the state machine completes. It can clear the interrupt by writing a 0 to the complete register.

val (interrupt, _) = outer.intnode.out(0)

interrupt(0) := complete