Debugging and Profiling on the FPGA¶
A common issue with FPGA-prototyping is the difficulty involved in trying to debug and profile systems once they are running on the FPGA. FireSim addresses these issues with a variety of tools for introspecting on designs once you have a FireSim simulation running on an FPGA. This section describes these features.
- Capturing RISC-V Instruction Traces with TracerV
- Assertion Synthesis: Catching RTL Assertions on the FPGA
- Printf Synthesis: Capturing RTL printf Calls when Running on the FPGA
- AutoILA: Simple Integrated Logic Analyzer (ILA) Insertion
- AutoCounter: Profiling with Out-of-Band Performance Counter Collection
- TracerV + Flame Graphs: Profiling Software with Out-of-Band Flame Graph Generation